In the field of semiconductor fabrication, electron beam lithography provides for increased spatial resolution as compared to light-based lithography. In electron beam lithography, electrons generated by an electron source are accelerated by an electric field and focused by electron optics onto a substrate covered with an electron-sensitive resist coating. In the case of a “positive” electron-sensitive resist coating, exposure of the resist to the focused electrons causes the resist to become soluble in the presence of a developing solution, vice-versa for “negative” resist. Therefore, the electron beam can be used to define layout patterns within the resist. Then, the patterned resist can be used as a stencil for a subsequent semiconductor fabrication process. One electron beam lithography technique involves moving the electron beam relative to the substrate to define the layout patterns within the resist. This technique is referred to as direct write electron beam lithography.
In direct write electron beam lithography, the achievable pattern resolution within the resist is dependent upon how well the spatial electron energy deposition can be controlled within the resist. The electron energy deposition at a given location in the resist includes two components: 1) the electron energy that is deposited at the given location by electrons incident at the given location, and 2) the integral of the electron energy deposited at the given location from electrons incident at other locations within the resist. As the incident electrons traverse through the resist and substrate, the electrons undergo scattering interactions with the resist and substrate such that electron energy is deposited within the resist material as a function of the distance from the initial point of electron beam incidence. The scattering range of the electrons can be significant with respect to the layout pattern feature sizes that are to be defined. Hence, layout pattern features that reside within the electron scattering range from each other can cause electron energy deposition interference. Electron energy deposition interference associated with neighboring layout pattern features is commonly referred to as proximity effect.
To achieve acceptable spatial resolution when defining smaller, e.g., sub-micron, layout pattern features using the direct write electron beam lithography process, it is necessary to adequately predict and correct for proximity effects. To this end, a continuing need exists to improve methods for electron beam proximity effect prediction and correction.